Yuxuan Zhao
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Yuxuan Zhao, Postdoctoral Fellow |
Biography
Currently, I am a postdoctoral researcher at Department of Computer Science and Engineering, The Chinese University of Hong Kong (CUHK). I received my Ph.D. degree from CUHK in 2025, supervised by Prof. Bei Yu. Prior to that, I received my B.Eng. in Information Engineering at Zhejiang University (ZJU) in 2021.
Research Interest
VLSI Placement
3D ICs
High Performance Computing in Physical Design
Machine Learning in EDA
Publication
Journal papers
[J5] Wendong Xu, Yuhao Ji, Yang Bai, Yueting Li, Yuxuan Zhao, Zhengwu Liu, Bei Yu, Ngai Wong,“PPD: A Portable and Highly Parallel Dispatching System for Deep Learning”, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025.
[J4] Jiaxi Jiang, Yuan Pu, Mingjun Li, Yuxuan Zhao, Peiyu Liao, Zuodong Zhang, Yibo Lin, Bei Yu, “RegPlace: Regularity-aware Placement for Full-System DNN Accelerator Designs”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2025.
[J3] Yuntao Lu, Chen Bai, Yuxuan Zhao, Ziyue Zheng, Yangdi Lyu, Mingyu Liu, Bei Yu, “DeepVerifier: Learning to Update Test Sequences for Coverage-Guided Verification”, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2025.
[J2] Yuxuan Zhao*, Peiyu Liao*, Siting Liu, Jiaxi Jiang, Yibo Lin, Bei Yu, “Analytical Heterogeneous Die-to-Die 3D Placement with Macros”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2024.
[J1] Peiyu Liao*, Yuxuan Zhao*, Dawei Guo, Yibo Lin, Bei Yu, “Analytical Die-to-Die 3D Placement with Bistratal Wirelength Model and GPU Acceleration”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), 2023.
Conference papers
[C11] Lancheng Zou, Sing Sen YE, Shuo Yin, Yuan Pu, Jiaxi Jiang, Siting Liu, Yuxuan Zhao, Bei Yu, “IncreMacro-3D: Incremental Macro Placement for Face-to-Face Stacked Memory-on-Logic 3D ICs”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.
[C10] Qinggong Shen, Chaoli Zhang, Haoyang Xu, Zhiwen Yu, Bin Guo, Yuxuan Zhao, Bei Yu, Tsung-Yi Ho, Xing Huang,“HPPlacer: A High-Precision Slack-Aware Global Placement Engine”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Verona, Italy, Apr. 20–22, 2026.
[C9] Zhen Zhuang, Zheng Yang, Yuxuan Zhao, Jiawei Hu, Bei Yu, Sung Kyu Lim, Tsung-Yi Ho, “DPO-3D: Differentiable Power Delivery Network Optimization via Flexible Modeling for Routability and IR-Drop Tradeoff in Face-to-Face 3D ICs”, IEEE/ACM Asian and South Pacific Design Automation Conference (ASPDAC), Hong Kong, Jan. 19-22, 2026.
[C8] Peiyu Liao*, Yuxuan Zhao*, Siting Liu, Bei Yu, “Ultrafast Density Gradient Accumulation in 3D Analytical Placement with Divergence Theorem”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025.
[C7] Yuxuan Zhao, Feng Gu, Siting Liu, Peiyu Liao, Bei Yu, “H3D: Heterogeneous Resources Aware Global Router for Face-to-Face Bonded 3D ICs”, IEEE/ACM International Conference on Computer-Aided Design (ICCAD), Munich, Oct. 26–30, 2025.
[C6] Yuxuan Zhao, Peiyu Liao, Bei Yu, “3D-Flow: Flow-based Standard Cell Legalization for 3D ICs”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025.
[C5] Xun Jiang, Haoran Lu, Yuxuan Zhao, Jiarui Wang, Zizheng Guo, Heng Wu, Bei Yu, Sung Kyu Lim, Runsheng Wang, Ru Huang, Yibo Lin, “A Systematic Approach for Multi-Objective Double-Side Clock Tree Synthesis”, ACM/IEEE Design Automation Conference (DAC), San Francisco, Jun. 22–25, 2025.
[C4] Yuxuan Zhao, Lancheng Zou, Bei Yu, “Physical Design for Advanced 3D ICs: Challenges and Solutions”, ACM International Symposium on Physical Design (ISPD), Austin, Mar. 16–19, 2025. (Invited Paper)
[C3] Yuxuan Zhao, Qi Sun, Zhuolun He, Yang Bai, Bei Yu, “AutoGraph: Optimizing DNN Computation Graph for Parallel GPU Kernel Execution”, AAAI Conference on Artificial Intelligence (AAAI), Feb. 7–14, 2023. (Oral)
[C2] Qi Sun, Xinyun Zhang, Hao Geng, Yuxuan Zhao, Yang Bai, Haisheng Zheng, Bei Yu, “GTuner: Tuning DNN Computations on GPU via Graph Attention Network”, ACM/IEEE Design Automation Conference (DAC), San Francisco, CA, Jul. 10–14, 2022.
[C1] Haoyu Yang, Kit Fung, Yuxuan Zhao, Yibo Lin, Bei Yu, “Mixed-Cell-Height Legalization on CPU-GPU Heterogeneous Systems”, IEEE/ACM Proceedings Design, Automation and Test in Europe (DATE), Mar. 14–23, 2022.
Awards
DAC Young Fellow Award, DAC, 2025
3rd Place Award in CAD Contest, ICCAD, 2022
Hong Kong PhD Fellowship, CUHK, 2021
First-Class Scholarship for Outstanding Merits, ZJU, 2017, 2018, 2019
National Scholarship, ZJU, 2017